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Contents
5
Preface
8
I UML-BASED SYSTEM SPECIFICATION & DESIGN
10
Chapter 1 UML-BASED CO-DESIGN FOR RUN-TIME RECONFIGURABLE ARCHITECTURES
13
1. Introduction
13
2. UML-Based Co-Design Approach
15
2.1 Motivation
15
2.2 Activities and Artifacts
16
3. System Specification
17
3.1 Platform Independent Model
17
3.2 MOCCA Action Language
18
4. Platform Mapping
19
4.1 Activities and Artifacts
19
4.2 Target Platform Model
20
4.3 Hardware Platform Mapping
20
4.4 Software Platform Mapping
23
5. Synthesis
24
6. Conclusions and Future Work
25
References
26
Chapter 2 A UNIFIED APPROACH TO CODE GENERATION FROM BEHAVIORAL DIAGRAMS
28
1. Introduction
28
2. The Rialto Intermediate Language
30
2.1 Syntax
30
2.2 Operational Semantics
32
2.3 Scheduling Semantics
33
3. Representing UML models in Rialto
34
3.1 Statecharts
34
3.2 Activity Diagrams
36
3.3 Collaboration Diagrams
36
3.4 Automatic UML to Rialto Translation
38
4. Animation and Code generation
39
5. Conclusions
40
References
40
Chapter 3 PLATFORM-INDEPENDENT DESIGN FOR EMBEDDED REAL-TIME SYSTEMS
42
1. Introduction
43
2. The Dream: Platform-Independent Design
44
3. Comparison of several design approaches for embedded RT systems
46
3.1 Expressive power
47
3.2 Platform-independent semantics
47
3.3 Modularity support
48
3.4 Correctness-preserving transformation
49
4. Towards Platform-independent Design
51
4.1 POOSL
52
4.2 Rotalumis
52
5. Conclusions
54
Notes
55
References
55
Chapter 4 REAL-TIME SYSTEM MODELING WITH ACCORD/UML METHODOLOGY
58
1. Introduction
58
2. Case study
60
3. Preliminary Analysis Model (PAM)
61
4. Detailed Analysis Model (DAM)
66
5. Validation by Prototyping (PrM) and Testing (TeM)
73
6. Conclusion and ongoing research projects
74
References
76
Chapter 5 UML-BASED SPECIFICATIONS OF AN EMBEDDED SYSTEM ORIENTED TO HW/SW PARTITIONING
78
1. Introduction
78
2. Why Hardware and Software Co-design starting from UML
79
3. Case Study: Problem description
81
3.1 Objective
81
3.2 The operational scenario
81
3.3 The project constraints
83
4. WMR System-level Specification with UML
84
4.1 Use Case diagrams
84
4.2 Sequence Diagrams
85
4.3 Object Model Diagram
87
5. UML-based Hardware and Software Partitioning Approach
88
5.1 STEP 1: Assign the "Partitionable" stereotype to desired objects, object types and packages
88
5.2 STEP 2: Assign parameter’s constraints
89
5.3 STEP 3: Parse the UML saved files
89
5.4 STEP 4: Assign parameters to components from a repository or attribute parameters by hand
90
5.5 STEP 5: Decide cost function to give weights to parameters
90
5.6 STEP 6: Run the partitioning tool
90
6. Concluding Remarks
90
References
91
II C-BASED SYSTEM DESIGN
92
Chapter 6 SPACE: A HARDWARE/SOFTWARE SYSTEMC MODELING PLATFORM INCLUDING AN RTOS
96
1. Introduction
96
2. RelatedWorks and objectives
98
3. SPACE and its methodology
100
4. Embedded Software environment
101
4.1 SystemC API
102
4.2 The RTOS
103
5. Hardware support
103
5.1 Abstraction level
103
5.2 UTF Channel
104
5.3 TF Channel
104
6. An example and its simulation results
106
7. Conclusion and future works
107
References
108
Chapter 7 LAERTE++: AN OBJECT ORIENTED HIGH-LEVEL TPG FOR SYSTEMC DESIGNS
110
1. Introduction
110
2. Laerte++ Philosophy
112
2.1 Laerte++ architecture
113
2.2 Testing procedure set-up
113
2.3 Additional features
114
3. Fault Injector
115
3.1 Definition of new fault models
115
4. TPG Engine
116
5. Applicability Example
120
6. Concluding Remarks
121
References
121
Chapter 8 A CASE STUDY: SYSTEMC-BASED DESIGN OF AN INDUSTRIAL EXPOSURE CONTROL UNIT
123
1. Introduction
124
2. Exposure Control Unit
125
3. SystemC Modeling and Refinement Process
127
4. Automated Fixed-Point to Integer Conversion
132
5. Experimental Results and Experiences
134
6. Conclusion
135
References
136
Chapter 9 MODELING OF CSP, KPN AND SR SYSTEMS WITH SYSTEMC
137
Introduction
137
1. Embedded system speci.cation in SystemC
139
1.1 Specification Structure
139
1.2 System specification
140
2. Modeling of CSP, KPN and SR systems
143
2.1 Modeling of CSP systems
143
2.2 Modeling of KPN systems
146
2.3 Modeling of SR systems
148
3. Conclusions
150
References
151
Chapter 10 ON HARDWARE DESCRIPTION IN ECL
153
1. Introduction
153
2. Overview of ECL
156
3. HW/SW Co-Design Flow with ECL
156
3.1 Specification and Refinement
157
3.2 Hardware Synthesis
159
4. Case Study: A Simple Processor
161
4.1 Processor Description
161
4.2 ECL Module Structure
162
4.3 Processor Synthesis Results
164
5. Conclusion
164
References
166
III ANALOG AND MIXED-SIGNAL SYSTEMS
167
Chapter 11 RULES FOR ANALOG AND MIXED-SIGNAL VHDL-AMS MODELING
171
1. Introduction
171
2. Simulation problem
172
2.1 Elaboration of the analog part
172
2.2 Characterization of solutions
174
3. Modeling rules
176
3.1 General rules
176
3.2 Initialization phase
177
3.3 Time domain simulation
180
3.4 Rules for mixed-signal models
181
4. Conclusion
183
References
183
Chapter 12 A VHDL-AMS LIBRARY OF HIERARCHICAL OPTOELECTRONIC DEVICE MODELS
185
Introduction
185
1. FromWAN to SAN
186
2. CAD tools for optoelectronic systems
186
2.1 Behavioral modelling
187
3. A hierarchical library
188
4. Optoelectronic devices
188
4.1 Laser and MQW laser
188
4.2 Vertical Cavity Surface Emitting Laser : VCSEL
190
4.3 The optical fiber
192
4.4 The PIN photodiode
195
5. An optical link
196
5.1 Simulation results
197
5.2 Exploiting results
197
6. Conclusion and perspectives
198
6.1 Library development
199
6.2 VHDL-AMS limitations
199
6.3 Methodology conclusion
199
References
200
Chapter 13 TOWARDS HIGH-LEVEL ANALOG AND MIXED-SIGNAL SYNTHESIS FROM VHDL-AMS SPECIFICATIONS
202
1. Introduction
202
2. VHDL-AMS Subset for Synthesis
205
3. High-Level Analog Synthesis
207
3.1 Tile Representation
209
4. Case Study
212
5. Conclusion
214
References
215
Chapter 14 RELIABILITY SIMULATION OF ELECTRONIC CIRCUITS WITH VHDL-AMS
218
1. Introduction
218
2. A degradation mechanism: hot carrier degradations
219
3. The reliability simulation today
220
4. Behavioural modelling for ageing simulation
222
5. Construction of the behavioural ageing model of a circuit
224
5.1 Organisation of the behavioural ageing model
224
5.2 Principle of the construction of the degradation model of circuit
225
5.3 Bias conditions analysis
225
5.4 The transistor ageing model
225
5.5 Sensitivity analysis
226
5.6 An OTA ageing behavioural model
228
5.7 Using the model for simulation
228
6. Conclusion
228
References
229
Chapter 15 EXTENDING SYSTEMC TO ANALOG MODELLING AND SIMULATION
230
1. Introduction
230
2. Description of Analog Modules in SystemC
231
3. Application Examples
236
3.1 RF transceiver
236
3.2 Mixed-Signal Fuzzy Controller
239
4. Conclusion
242
References
243
IV LANGUAGES FOR FORMAL METHODS
244
Chapter 16 LINKING ARCHITECTURAL AND COMPONENT LEVEL SYSTEM VIEWS BY ABSTRACT STATE MACHINES
247
1. Introduction
247
2. Relating high-level and component-level system views
249
2.1 The language of ASMs
250
2.2 Navigation between levels of detail
254
3. Submachine-based component concept
258
3.1 Operators for the Composition of Components
259
3.2 Speci.c ASM component concepts
262
3.3 Componentwise system development: an example
263
4. Conclusion
265
Notes
265
References
265
Chapter 17 A NEW TIME EXTENSION TO p-CALCULUS BASED ON TIME CONSUMING TRANSITION SEMANTICS
270
1. Introduction
270
2. RelatedWork
271
3. Brief introduction to calculus
272
4. Time Consuming Transitions
273
5. Temporal properties of TLTS
278
6. Conclusion and Future Work
280
Notes
281
References
281
Chapter 18 MODELING CHP DESCRIPTIONS IN LABELED TRANSITIONS SYSTEMS FOR AN EFFICIENT FORMAL VALIDATION OF ASYNCHRONOUS CIRCUIT SPECIFICATIONS
283
1. Introduction
283
2. Translation from CHP to Petri Nets and IF
286
2.1 The Petri Nets and IF models
286
2.2 CHP components
287
2.3 CHP processes
288
2.4 Inter-process communications and probes
289
2.5 Optimizations
290
3. Performance study
291
4. Case study: a four-tap FIR Filter
295
4.1 Modeling the Filter in IF
295
4.2 Some verified properties
295
4.3 Verification by behavior reduction
296
4.4 Handling state explosion
297
5. Conclusion
297
References
297
Chapter 19 COMBINED FORMAL REFINEMENT AND MODEL CHECKING FOR REAL-TIME SYSTEMS VERIFICATION
299
1. Introduction
299
2. RelatedWork
300
3. Real-Time Model Checking with RAVEN
301
4. Refinement with B
302
5. Combined Model Checking and Refinement
303
5.1 The Echo Cancellation Unit
305
5.2 RIL Code Generation
306
5.3 B Generation
307
5.4 RIL Refinement
308
5.5 BT Generation
309
5.6 BT Refinement and C Code Generation
310
6. Experimental Results
310
7. Conclusions
311
References
312
Chapter 20 REFINEMENT OF HYBRID SYSTEMS
313
1. Introduction
313
2. HyCharts
316
3. Modeling Hybrid Control Systems with SystemC
322
4. Translation of discrete HyCharts to SystemC
324
5. Conclusion and Future Work
327
References
327
V APPLICATIONS AND NEW LANGUAGES
329
Chapter 21 AUTOMOTIVE SOFTWARE ENGINEERING
330
1. Introduction
330
2. Characteristics of Automotive Software Engineering
331
2.1 Observable Symptoms
332
2.2 Main Characteristics of ASE
335
3. The Demands for an Automotive Software Engineering Discipline
336
3.1 Process Paradigm
336
3.2 Requirements Engineering
337
3.3 Software Architecture & Design
338
3.4 Specification
340
3.5 Implementation
341
3.6 Test
341
3.7 Maintenance
342
4. Conclusion
343
References
343
Chapter 22 SYSTEMVERILOG
345
1. Introduction
345
2. Features of SystemVerilog
349
3. Challenges
351
4. Summary
353
Bibliography and Resources
353
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